Macros
#define	WS_CART_BANK_ROML_PORT 0xC0
#define	WS_CART_BANK_RAM_PORT 0xC1
#define	WS_CART_BANK_ROM0_PORT 0xC2
#define	WS_CART_BANK_ROM1_PORT 0xC3
#define	WS_CART_BANK_FLASH_PORT 0xCE
#define	WS_CART_BANK_FLASH_ENABLE 0x01
#define	WS_CART_BANK_FLASH_DISABLE 0x00
#define	WS_CART_EXTBANK_ROML_PORT 0xCF
#define	WS_CART_EXTBANK_RAM_PORT 0xD0
#define	WS_CART_EXTBANK_ROM0_PORT 0xD2
#define	WS_CART_EXTBANK_ROM1_PORT 0xD4

Detailed Description

Macro Definition Documentation

◆ WS_CART_BANK_FLASH_DISABLE

#define WS_CART_BANK_FLASH_DISABLE 0x00

Definition at line 41 of file ports.h.

◆ WS_CART_BANK_FLASH_ENABLE

#define WS_CART_BANK_FLASH_ENABLE 0x01

Definition at line 40 of file ports.h.

◆ WS_CART_BANK_FLASH_PORT

#define WS_CART_BANK_FLASH_PORT 0xCE

Control ROM/Flash access in RAM bank area.

Definition at line 39 of file ports.h.

◆ WS_CART_BANK_RAM_PORT

#define WS_CART_BANK_RAM_PORT 0xC1

RAM (0x10000 - 0x1FFFF) bank address (up to 16 MiB).

Definition at line 24 of file ports.h.

◆ WS_CART_BANK_ROM0_PORT

#define WS_CART_BANK_ROM0_PORT 0xC2

ROM0 (0x20000 - 0x2FFFF) bank address (up to 16 MiB).

Definition at line 29 of file ports.h.

◆ WS_CART_BANK_ROM1_PORT

#define WS_CART_BANK_ROM1_PORT 0xC3

ROM1 (0x30000 - 0x3FFFF) bank address (up to 16 MiB).

Definition at line 34 of file ports.h.

◆ WS_CART_BANK_ROML_PORT

#define WS_CART_BANK_ROML_PORT 0xC0

Linear ROM (0x40000 - 0xFFFFF) bank address.

Definition at line 19 of file ports.h.

◆ WS_CART_EXTBANK_RAM_PORT

#define WS_CART_EXTBANK_RAM_PORT 0xD0

RAM (0x10000 - 0x1FFFF) bank address (up to 4 GiB).

Definition at line 51 of file ports.h.

◆ WS_CART_EXTBANK_ROM0_PORT

#define WS_CART_EXTBANK_ROM0_PORT 0xD2

ROM0 (0x20000 - 0x2FFFF) bank address (up to 4 GiB).

Definition at line 56 of file ports.h.

◆ WS_CART_EXTBANK_ROM1_PORT

#define WS_CART_EXTBANK_ROM1_PORT 0xD4

ROM1 (0x30000 - 0x3FFFF) bank address (up to 4 GiB).

Definition at line 61 of file ports.h.

◆ WS_CART_EXTBANK_ROML_PORT

#define WS_CART_EXTBANK_ROML_PORT 0xCF