memory.h

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/*
 * Copyright (c) 2022 Adrian "asie" Siekierka
 *
 * This software is provided 'as-is', without any express or implied
 * warranty. In no event will the authors be held liable for any damages
 * arising from the use of this software.
 *
 * Permission is granted to anyone to use this software for any purpose,
 * including commercial applications, and to alter it and redistribute it
 * freely, subject to the following restrictions:
 *
 * 1. The origin of this software must not be misrepresented; you must not
 *    claim that you wrote the original software. If you use this software
 *    in a product, an acknowledgment in the product documentation would be
 *    appreciated but is not required.
 *
 * 2. Altered source versions must be plainly marked as such, and must not be
 *    misrepresented as being the original software.
 *
 * 3. This notice may not be removed or altered from any source distribution.
 */

 
#ifndef LIBWS_MEMORY_H_
#define LIBWS_MEMORY_H_
 
#ifndef __ASSEMBLER__
#include <stdbool.h>
#include <stdint.h>
#include <wonderful.h>
#include "ports.h"
#include "util.h"
#endif

 
#define WS_IRAM_SEGMENT 0x0000
#define WS_SRAM_SEGMENT 0x1000
#define WS_ROM0_SEGMENT 0x2000
#define WS_ROM1_SEGMENT 0x3000
 
#ifndef __ASSEMBLER__

#define ws_iram __wf_iram

#define ws_sram __wf_sram

#define ws_rom __wf_rom

#define ws_far __far

#define ws_ptr_offset(x) ((uint16_t) (x))

#define ws_ptr_segment(x) FP_SEG(x)

#define ws_ptr_far(seg, ofs) MK_FP(seg, ofs)

static inline uint32_t ws_ptr_to_linear(const void ws_far *src) {
    return ((((uint32_t) src) >> 12) & 0xFFFF0) + ((uint16_t) ((uint32_t) src));
}

static inline const void ws_far *ws_ptr_from_linear(uint32_t src) {
    return ws_ptr_far(src >> 4, src & 0xF);
}

#define WS_IRAM_MEM ((uint8_t ws_iram*) 0x00000000)
#define WS_SRAM_MEM ((uint8_t ws_sram*) 0x10000000)
#define WS_ROM0_MEM ((uint8_t __far*) 0x20000000)
#define WS_ROM1_MEM ((uint8_t __far*) 0x30000000)
 
#ifdef LIBWS_USE_EXTBANK
typedef uint16_t ws_bank_t; 

static inline ws_bank_t _ws_bank_save(uint8_t port, ws_bank_t new_bank) {
    asm volatile("" ::: "memory");
    volatile ws_bank_t old_bank = inportw(port);
    outportw(port, new_bank);
    asm volatile("" ::: "memory");
    return old_bank;
}
 
static inline void _ws_bank_set(uint8_t port, ws_bank_t new_bank) {
    asm volatile("" ::: "memory");
    outportw(port, new_bank);
    asm volatile("" ::: "memory");
}
 
#define _ws_bank_ram_port WS_CART_EXTBANK_RAM_PORT
#define _ws_bank_rom0_port WS_CART_EXTBANK_ROM0_PORT
#define _ws_bank_rom1_port WS_CART_EXTBANK_ROM1_PORT
#define _ws_bank_roml_port WS_CART_EXTBANK_ROML_PORT
#else
typedef uint8_t ws_bank_t; 

static inline ws_bank_t _ws_bank_save(uint8_t port, ws_bank_t new_bank) {
    asm volatile("" ::: "memory");
    volatile ws_bank_t old_bank = inportb(port);
    outportb(port, new_bank);
    asm volatile("" ::: "memory");
    return old_bank;
}
 
static inline void _ws_bank_set(uint8_t port, ws_bank_t new_bank) {
    asm volatile("" ::: "memory");
    outportb(port, new_bank);
    asm volatile("" ::: "memory");
}
 
#define _ws_bank_ram_port WS_CART_BANK_RAM_PORT
#define _ws_bank_rom0_port WS_CART_BANK_ROM0_PORT
#define _ws_bank_rom1_port WS_CART_BANK_ROM1_PORT
#define _ws_bank_roml_port WS_CART_BANK_ROML_PORT
#endif

#define ws_bank_within_(var, loc, prev_bank, ...) \
    { \
        extern const void __bank_ ## var; \
        __attribute__((cleanup(ws_bank_ ## loc ## _cleanup_))) \
        ws_bank_t prev_bank = ws_bank_ ## loc ## _save((unsigned int) (&__bank_ ## var)); \
        __VA_ARGS__ \
    }
 
#define ws_bank_with_(var, loc, prev_bank, ...) \
    { \
        __attribute__((cleanup(ws_bank_ ## loc ## _cleanup_))) \
        ws_bank_t prev_bank = ws_bank_ ## loc ## _save((unsigned int) var); \
        __VA_ARGS__ \
    }

#define ws_bank_ram_save(new_bank) _ws_bank_save(_ws_bank_ram_port, (new_bank))

#define ws_bank_ram_set(new_bank) _ws_bank_set(_ws_bank_ram_port, (new_bank))
#define ws_bank_ram_restore ws_bank_ram_set
static inline void ws_bank_ram_cleanup_(ws_bank_t *bank) { ws_bank_ram_restore(*bank); }

#define ws_bank_within_ram(var, ...) ws_bank_within_(var, ram WF_MACRO_CONCAT(_wf_bank_, __COUNTER__), __VA_ARGS__)

#define ws_bank_with_ram(bank, ...) ws_bank_with_(bank, ram, WF_MACRO_CONCAT(_wf_bank_, __COUNTER__), __VA_ARGS__)

#define ws_bank_rom0_save(new_bank) _ws_bank_save(_ws_bank_rom0_port, (new_bank))

#define ws_bank_rom0_set(new_bank) _ws_bank_set(_ws_bank_rom0_port, (new_bank))
#define ws_bank_rom0_restore ws_bank_rom0_set
static inline void ws_bank_rom0_cleanup_(ws_bank_t *bank) { ws_bank_rom0_restore(*bank); }

#define ws_bank_within_rom0(var, ...) ws_bank_within_(var, rom0, WF_MACRO_CONCAT(_wf_bank_, __COUNTER__), __VA_ARGS__)

#define ws_bank_with_rom0(bank, ...) ws_bank_with_(bank, rom0, WF_MACRO_CONCAT(_wf_bank_, __COUNTER__), __VA_ARGS__)

#define ws_bank_rom1_save(new_bank) _ws_bank_save(_ws_bank_rom1_port, (new_bank))

#define ws_bank_rom1_set(new_bank) _ws_bank_set(_ws_bank_rom1_port, (new_bank))
#define ws_bank_rom1_restore ws_bank_rom1_set
static inline void ws_bank_rom1_cleanup_(ws_bank_t *bank) { ws_bank_rom1_restore(*bank); }

#define ws_bank_within_rom1(var, ...) ws_bank_within_(var, rom1, WF_MACRO_CONCAT(_wf_bank_, __COUNTER__), __VA_ARGS__)

#define ws_bank_with_rom1(bank, ...) ws_bank_with_(bank, rom1, WF_MACRO_CONCAT(_wf_bank_, __COUNTER__), __VA_ARGS__)

#define ws_bank_roml_save(new_bank) _ws_bank_save(_ws_bank_roml_port, (new_bank))

#define ws_bank_roml_set(new_bank) _ws_bank_set(_ws_bank_roml_port, (new_bank))
#define ws_bank_roml_restore ws_bank_roml_set
static inline void ws_bank_roml_cleanup_(ws_bank_t *bank) { ws_bank_roml_restore(*bank); }

#define ws_bank_within_roml(var, ...) ws_bank_within_(var, roml, WF_MACRO_CONCAT(_wf_bank_, __COUNTER__), __VA_ARGS__)

#define ws_bank_with_roml(bank, ...) ws_bank_with_(bank, roml, WF_MACRO_CONCAT(_wf_bank_, __COUNTER__), __VA_ARGS__)
 
#endif

 
#endif /* LIBWS_MEMORY_H_ */