Wonderful Toolchain Wiki

This page is read only. You can view the source, but not change it. Ask your administrator if you think this is wrong.
====== Pocket Challenge V2/pinstrap support ======

"Pinstrap support" refers to an alternate mode of execution where code is executed from ''4000:0000'' or ''4000:0010'' instead of executing the full boot ROM logic and jumping to ''FFFF:0000''. It is documented in more detail on [[https://ws.nesdev.org/wiki/Boot_ROM|the WSdev wiki]].

The Pocket Challenge V2 uses the same ASWAN SoC as the "mono" WonderSwan, but it repurposes the bit 1 pinstrap (code starts at ''4000:0010'') in order to bypass the Bandai splash screen, seeing as it is instead a Benesse product. This page documents how to use Wonderful to create a cartridge image that boots on the PCv2.

===== Adding the alternate start location =====

To add a stub at ''4000:0010'' which jumps to your program, replace ''%%$(WF_CRT0)%%'' in your Makefile with ''%%$(WF_CRT0) $(WF_CRT0_PINSTRAP1)%%''.

For ''4000:0000'', add ''%%$(WF_CRT0_PINSTRAP0)%%'' instead. You can also add both.

===== Adding missing hardware initialization =====

The pinstrap mode omits certain hardware initialization code that occurs in the boot ROM. In particular, the LCD display driver is never enabled. To solve this, add the following code to your program:

<code C>
    outportb(WS_LCD_CTRL_PORT, inportb(WS_LCD_CTRL_PORT) | WS_LCD_CTRL_DISPLAY_ENABLE);
</code>

===== Preserving unlocked boot ROM =====

The default pinstrap stubs disable the boot ROM before jumping to user code, as the pinstrap mode starts with the boot ROM overlaid on top of the cartridge area at ''0xFF000'' - ''0xFFFFF''. If you'd like to instead access the boot ROM contents, you have to perform the following steps:

  * Replace ''%%$(WF_CRT0_PINSTRAP1)%%'' with ''%%$(WF_CRT0_PINSTRAP1_UNLOCKED)%%''.
  * Add ''%%rom_reserve_bootrom_area = true%%'' to the ''%%[cartridge]%%'' section of ''%%wfconfig.toml%%''. This will reserve the final 8 KiB of the cartridge space, preventing any data assigned to the linear ROM bank (but //not// assigned to ROM0 or ROM1 banks) from being placed there.